(1) Field of the Invention
The present invention relates to a processor and a method of booting it, especially a processor in a baseband LSI (Large-Scale Integration) for a mobile communication system, especially for W-CDMA (Wideband Code Division Multiple Access) system and a method of booting it.
In recent years, in a baseband LSI for W-CDMA used in a portable device for a mobile communication system, during periodic receive operation which is performed in a standby state, i.e., except when the portable device is being used, to check call, a block that is needed for call is powered on and the rest is powered off, in order to reduce battery power consumption and thereby make the maximum duration of a continuous call and the maximum standby duration longer.
(2) Description of the Related Art
FIG. 7 is a diagram showing a method of booting a conventional processor.
In FIG. 7, a DSP (Digital Signal Processor) 101 is, for example, in the case of a baseband LSI for W-CDMA, a processor that controls a modem section for modulating and demodulating a signal such as a sound wave and a codec section for performing scrambling and error correction. The DSP 101 is included in a block that is powered on during periodic receive operation in a standby state and powered off during the rest of time. To the DSP 101 are connected an instruction memory 102 for storing instructions and a table data memory 103 for storing table data. Also a boot ROM 104 for storing instructions of programs and table data of initial values, a backup memory 105 for storing table data when periodic receive operation ends, and a CPU (Central Processing Unit) 106 for controlling transfer of table data into the backup memory 105 are connected to the DSP 101. The backup memory 105 and the CPU 106 are included in a block that is not powered off while a system incorporating the DSP 101 is being used.
Here, when power is turned on initially, the DSP 101 first reads instructions from the boot ROM 104 and writes them into the instruction memory 102 (path a). Next, the DSP 101 reads table data from the boot ROM 104 and writes it into the table data memory 103 (path b). After finishing the writing, the DSP 101 calculates a sum of data that forms the instructions and the table data and checks that the calculated sum agrees with an expected value that has been read together (This operation will be hereinafter referred to “check-sum”). The fact that the calculated sum agrees with the expected value proves that the DSP 101 has read data from the boot ROM 104 correctly. Then, the DSP 101 performs periodic receive operation using programs in the instruction memory 102 and the table data (initial values) in the table data memory 103.
When periodic receive operation is to be performed, a block including the DSP 101, the instruction memory 102 and the table data memory 103 is powered on. With this, the DSP 101 first reads instructions from the boot ROM 104 and writes them into the instruction memory 102 (path a) and reads table data from the boot ROM 104 and writes it into the table data memory 103 (path b). After finishing the writing, the DSP 101 performs check-sum. Next, table data that was saved in the backup memory 105 when power was turned off last is read through the CPU 106 and written into the table data memory 103 (path c). At this time, the table data in the table data memory 103, which was read from the boot ROM 104, is replaced with the table data in the backup memory 105. Then, the DSP 101 performs periodic receive operation using programs in the instruction memory 102 and the table data in the table data memory 103.
This method of booting the conventional processor has however a problem. Specifically, in this method, when power is turned on for periodic operation as well as when power is turned on initially, both programs and table data are read from the boot ROM in boot process. However, when power is turned on for periodic operation, table data having initial values is replaced with backed-up table data. Therefore, it is not necessary to read the table data having initial values. Dispensable circuit operation increases power consumption and makes battery duration correspondingly shorter.